Lanxin Computing (Shenzhen) Technology Co., Ltd., a RISC-V CPU and AI chip company, has closed a Series B round totaling nearly 2 billion yuan. According to Beijing Business Today, Cowin Capital disclosed the deal in an October 13 post; existing shareholders increased their stakes while several local state-owned funds, strategic corporate investors and leading venture firms joined for the first time.
Behind the round sits a more concrete development: a Lenovo WenTian server built around Lanxin's LX500 chip rolled off the line at the LCFC plant in Hefei in July this year, and the chip has so far secured orders for more than 200,000 units from customers including Lenovo, China Mobile and Tencent Cloud.
First-Hand Source: A Listed Company Filing
Unlike most funding announcements, this one originated with a listed company's disclosure. Cowin Capital (300991), one of the investors in the round, said on October 13 that Lanxin had completed its Series B financing at a combined scale of nearly 2 billion yuan.
The investor lineup splits into two groups. Returning shareholders added to their positions: Shenzhen Capital Group, Huakong Fund and Longqiu Capital. New entrants included Su Guotou, Su Chuangtou, GigaDevice, Taiping Kechuang, Cowin Capital, Guoxiang Capital, CCB International, Yueke Financial and Jiukun Venture Capital, spanning government guidance funds, corporate investors and top-tier venture firms.
The company said the proceeds will go toward mass production of its RISC-V CPU chips, iteration of its heterogeneous AI processors, and expansion of general-purpose computing power solutions aimed at telecom carriers, financial institutions and cloud service providers.
Founded in 2023 and headquartered in Shenzhen's Nanshan district, Lanxin has branches and R&D centers in Beijing, Shanghai, Xi'an, Suzhou and Hong Kong. Founder and CEO Lu Shan has more than 20 years of experience in high-performance CPU and SoC design. He earned his bachelor's degree from the Department of Automation at Tsinghua University and a PhD in electrical and computer engineering from Boston University, then worked at Intel and Qualcomm. In 2019 he joined ByteDance's chip team at its San Diego office in the US as head of its RISC-V and server chip projects, leaving in May 2023 to start his own company. CTO Jia Xinxia has 21 years of chip design experience, with previous stints at HiSilicon and Qualcomm.
The LX500's Edge Is Not Raw Compute, It Is the Data Path
According to the company, the LX500 is the world's first server-class CPU to natively combine RISC-V general-purpose computing and AI compute on a single chip. It uses a 48-core heterogeneous design, with 32 high-performance cores handling high-throughput general computing and 16 energy-efficient cores taking lighter workloads. An on-chip AI engine delivers peak performance of 75 TOPS (INT8) and supports INT4, INT8, FP16 and FP32 precision formats, along with the RVV 1.0 vector extension and the RVA23 standard profile. It also offers full support for CXL 2.0 memory expansion.
What actually determines whether a chip like this makes it into production environments is not peak compute but the path the data travels. In the conventional "CPU plus discrete AI accelerator card" architecture, a single inference job shuttles data repeatedly between the CPU, memory and the accelerator. The LX500 compresses that path onto the die through unified memory management and end-to-end on-chip AI inference acceleration.
Support for standard profiles matters just as much. RVA23 is the RISC-V profile for application processors, and supporting it means the chip can plug into mainstream software ecosystems. CXL 2.0, meanwhile, is the standard for memory expansion, which directly determines whether a chip of this kind can meet the memory demands of large models.
Production Has Started, but Volume Production Comes Later
As reported by EE Times China, Lanxin's production timeline has already reached working hardware. In February 2026 the LX500 taped out successfully on the first attempt, powered up and booted Linux. In July the same year, the Lenovo WenTian WR5219 G5 server built on the LX500 officially rolled off the line at Lenovo's LCFC plant in Hefei, Anhui, marking the point at which RISC-V servers entered mass production in China. The server has been adapted to China Mobile's BC-LINUX operating system and has run large models including Kimi-K2.6 and Qwen3.6-35B stably.
Customer traction is equally specific: the LX500 has won orders for more than 200,000 units from customers including Lenovo, China Mobile and Tencent Cloud, and the company has signed strategic partnerships with Lenovo Group, China Mobile, Tencent Cloud and 21Vianet, among others.
Still, there is a difference between "in mass production" and "in large-scale mass production." Lu Shan said earlier that the task for 2026 is to begin volume testing in China and the US simultaneously, with the aim of reaching large-scale mass production in 2027. That is a stated goal, not orders already on the books.
RISC-V Is Moving From Policy Language to Procurement Lists
Lanxin's customer list features Lenovo, China Mobile and Tencent Cloud at once: a hardware maker, a carrier and a cloud provider. Those three are precisely the main decision-makers in government, enterprise and large-scale computing power procurement, a sign that RISC-V server chips are moving from the "policy encouragement" stage to the stage of being eligible for purchase orders.
The policy alignment is explicit as well. The 15th Five-Year Plan for the Development of the Electronic Information Manufacturing Industry, jointly issued in September this year by the Ministry of Industry and Information Technology and the National Development and Reform Commission, calls in its ninth priority task for "advancing the R&D and industrialization of the fifth-generation reduced instruction set (RISC-V) and supporting the application of RISC-V chips in fields such as artificial intelligence and embedded systems."
On market size, EE Times China, citing a report from SHD Group, forecasts that RISC-V will hold a 28% share of the data center market by 2030, forming a three-way split with x86 and ARM.
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