The RISC-V Summit China took place in Shenzhen on October 19. RISC-V, an open-source CPU instruction set architecture, is closing the gap with x86 and Arm and pushing into high-value segments including AI, servers and automotive. At the summit, Alibaba's DAMO Academy said its XuanTie RISC-V processors have made notable gains in Agentic AI and server workloads through architectural innovation, software compatibility and ecosystem partnerships, moving high-performance RISC-V from merely "usable" to "reliable" and toward mass production. The academy also published a processor roadmap for autonomous driving and embodied intelligence, taking RISC-V into new territory.

Industry forecasts put annual RISC-V processor shipments on a 50% growth track, with market share reaching roughly 25% by 2030. In March this year, DAMO Academy released XuanTie C950, which set a new global performance record for RISC-V.

Automotive-Grade E908A: Meeting ASIL-B and ASIL-D Simultaneously

In his keynote, DAMO Academy Chief Scientist Meng Jianyi said: "For high-performance RISC-V to genuinely reach mass production, it takes more than a flagship processor. It requires sustained hardware and software R&D and engineering validation to carry it from 'usable' to 'reliable' and on to outstanding performance."

DAMO Academy's XuanTie line is moving into high-performance automotive-grade processors for autonomous driving and embodied intelligence. The automotive-enhanced XuanTie E908A announced at the summit is the first RISC-V CPU IP to meet both the ASIL-B and ASIL-D standards, and the first in the industry to exceed 90% single-point fault metric (SPFM), providing a safe and reliable real-time compute foundation for safety islands, domain controllers and automotive gateways.

DAMO Academy also released its first roadmap for autonomous driving and embodied intelligence products. The next-generation C950A targets five times the performance of existing RISC-V automotive-grade products.

C950 as the Foundation: Over 10% Gains Across Four Agentic Workloads

Meng said XuanTie C950 has become the innovation base for high-performance RISC-V. For server-class workloads, the XuanTie multi-core interconnect product XT-LINK is steadily improving C950's multi-core scaling. For AI applications, the full XuanTie lineup accelerates general-purpose compute, matrix operations, memory bandwidth and software co-design as an integrated package.

According to the company, XuanTie C950 performs well across four categories of Agentic workloads, delivering more than 10% improvement over mainstream legacy-architecture processors, with further gains when running cloud-side MoE and on-device dense models. Running Qwen3.8-Flash-Next, released in August this year, it reaches an inference speed of 43 tokens per second.

Ecosystem: Second Globally in GCC Contributions, Over Half of OpenJDK Code

As RISC-V expands rapidly, building a shared ecosystem and avoiding fragmentation have become industry-wide concerns. DAMO Academy's XuanTie team is a significant open-source contributor and standards author within the international RISC-V community.

  • Compiler: DAMO Academy ranks second globally in RISC-V-related contributions to the GCC community, bringing typical performance gains of more than 10% to RISC-V processors.
  • Java ecosystem: More than half of the RISC-V code in the OpenJDK community comes from DAMO Academy, and XuanTie C950 is the first to achieve deep adaptation and optimization between RISC-V and server-side Java, improving performance by 30%.
  • Operating systems: DAMO Academy's RISC-V work is now supported by several commercial operating system distributions, on top of which large commercial applications including Taobao, DingTalk, WeChat and WPS run successfully.
  • International foundation: XuanTie is deeply involved in building the RVI CSC certification baseline and has open-sourced 2,796 test cases, helping establish global RISC-V compatibility testing standards.

Looking ahead, DAMO Academy is addressing further architectural questions through open collaboration. Together with the Beijing Institute of Open Source Chip and Sanechips, it has reached interim results on frontier technologies such as simultaneous multithreading (SMT), achieving a 30% performance gain from dual threading. The academy is also taking part in the Ruyi community led by the Institute of Software at the Chinese Academy of Sciences, working with more than 20 organizations in China and abroad on software adaptation for the AME matrix compute instruction set extension. It continues to contribute standards technology to RISC-V International and has supplied development boards to RISE, the global RISC-V software ecosystem program, to broaden on-device software adaptation and optimization.

The RISC-V Summit China ranks alongside the North American and European summits as one of the three major RISC-V events worldwide. RISC-V International CEO Andrea Gallo told attendees: "From AI to robotics, RISC-V breakthroughs are everywhere, and China is leading in many technical directions."