On September 18, Yixing Intelligence, a developer of RISC-V chips for cloud AI computing, announced that it had raised nearly 2 billion yuan in a new funding round, bringing its post-money valuation close to 15 billion yuan.

More than 20 institutions participated in the round, including Huatai Innovation, Eastern Bell Capital, SMIC Juyuan, 9An Medical, Ren'ai Capital, Tongfu Microelectronics, SAYI Industry Fund, Heli Capital, Sino IC Leasing, Hengxu Capital, SAIC Capital, JAC Capital Zhanlu, and Rongyi Capital.

This is Yixing Intelligence's third major financing round of 2026. The company completed a 1.5 billion yuan Series B round in April, followed by a strategic investment of several hundred million yuan from China Mobile's Chain Leader Fund in May. Proceeds from the latest round are expected to support commercialization of the Epoch series, next-generation product development, and the buildout of its supernode and software ecosystems.

Bringing RISC-V to Cloud AI Computing

Founded in 2022, Yixing Intelligence develops AI computing chips for cloud and data center use. Its technology combines the open RISC-V instruction set with a TPU-like specialized architecture. The company has also developed its own EVAMIND compute core, VISA virtual instruction set, and EVACA software platform.

RISC-V is an open reduced instruction set architecture. Unlike proprietary instruction sets that require commercial licenses, RISC-V allows chip companies to extend instructions for specific applications, offering advantages in technological autonomy and customized computing.

Using RISC-V for large-scale cloud AI computing, however, requires more than improving the performance of an individual chip. Developers must also address high-speed interconnects, memory access, compiler tools, model compatibility, and cluster stability. Yixing Intelligence has therefore expanded beyond chips into accelerator boards, servers, supernodes, and computing power clusters.

Epoch Chips Enter Large-Scale Delivery

Epoch is Yixing Intelligence's first generation of cloud AI chips. The series has entered mass production and customer delivery, according to the company. Information previously released by the Beijing Economic-Technological Development Area also confirmed that Epoch had reached large-scale production.

Epoch natively supports block-wise quantized FP8 computing and is designed primarily for large-model training and inference. FP8 can increase computing throughput while reducing storage and data-transfer demands, though real-world model performance also depends on the quantization method, software optimization, and workload.

Yixing Intelligence says Epoch ranks among China's leading mass-produced products in floating-point computing performance, chip interconnect bandwidth, and token throughput for large-parameter models. It has also completed compatibility certification with related supernode systems.

The company has yet to disclose complete figures for Epoch's cumulative shipments, major customers, revenue, or standardized benchmark results across different models. More public testing and customer deployment data will be needed to verify its real-world performance relative to other Chinese and overseas cloud AI chips.

First 64-Node Supernode Cluster Deployed in Shijiazhuang

In July 2026, Yixing Intelligence unveiled a RISC-V AI computing supernode at the World Artificial Intelligence Conference. Built around Epoch chips, the system integrates the company's ELink high-speed interconnect, an orthogonal backplane-free architecture, liquid cooling, and its proprietary EVACA software platform.

Two months later, the first supernode cluster was deployed at a telecom operator's data center in Shijiazhuang, Hebei province.

The cluster uses a 64-node orthogonal backplane-free architecture and E200-L liquid-cooled OAM modules, enabling hundred-nanosecond-class interconnects among 64 Epoch chips. Compared with conventional servers that rely on extensive cabling, the design shortens data-transfer paths between chips and reduces wiring complexity in high-density clusters.

In mixture-of-experts models, different expert modules may be distributed across multiple chips. Inference requires frequent data exchanges, making inter-chip bandwidth and latency direct factors in token generation efficiency. Yixing Intelligence says its 64-chip interconnect improves collaborative inference throughput for MoE models, though it has not released detailed performance data under standardized test conditions.

Next-Generation Chip Tapes Out

Yixing Intelligence also said its next-generation cloud AI chip has completed tape-out, with computing and interconnect performance several times that of the first-generation product.

At the system level, the company is developing a second-generation supernode. Under its roadmap, the new system is expected to deliver more than 10 times the inference performance of the current design when large-model prefill and decode workloads are deployed separately. A single pod of the second-generation supernode will support up to 16,384 accelerator cards and scale to clusters containing more than 100,000 cards.

The company also plans to release a new generation of chips and supernodes every year and increase overall system performance by 400 times within three years. Its target is a 20-fold improvement in system-level performance for the second-generation supernode, followed by further gains in chip performance and system integration in the third generation.

These figures reflect the company's product roadmap or internal testing criteria. Whether it can achieve them will depend on several factors, including chip manufacturing, memory and interconnect supplies, software optimization, system delivery, and customer adoption.

Open-Sourcing the VISA Virtual Instruction Set

On the software side, Yixing Intelligence is working to open-source its VISA virtual instruction set and maintain it jointly with Chinese RISC-V open-source organizations. The aim is to create a relatively unified software interface between the underlying chip architecture and higher-level AI frameworks.

The accompanying EVACA software stack includes high-performance operator libraries, compilers, and model deployment tools, and supports mainstream frameworks including PyTorch, vLLM, and SGLang. The company is also working with Chinese AI software ecosystems such as FlagOS to reduce the engineering costs of migrating large models to Epoch chips.

For Chinese AI chips, the software ecosystem often matters more to adoption than raw hardware specifications. The ease of model migration, coverage of commonly used operators, stability of inference engines, and availability of mature debugging tools all directly affect actual chip utilization.

Policy Support for RISC-V Commercialization

A recently issued 15th Five-Year Plan for the development of the electronic information manufacturing industry, published by the Ministry of Industry and Information Technology and the National Development and Reform Commission, calls for faster R&D and commercialization of the fifth-generation reduced instruction set architecture RISC-V and supports the use of related chips in areas including artificial intelligence and embedded systems.

Policy support offers a new window for RISC-V chip development and ecosystem building, but the cloud AI chip market still presents steep technical and commercial barriers. Beyond chip performance, companies must demonstrate that their products can run reliably in large-scale clusters and compete on energy consumption, procurement costs, model compatibility, and token output efficiency.

Yixing Intelligence has established an initial product lineup spanning chips, modules, supernodes, and clusters. Key metrics to watch next include actual Epoch chip shipments, the stable operation of its supernode clusters, the timeline for mass production of its next-generation chip, and whether these products can generate recurring revenue.